1. Field of the Invention
The present invention relates to timing recovery in packet-based electronic or optical networks.
2. Description of the Related Art
This section introduces aspects that may help facilitate a better understanding of the invention. Accordingly, the statements of this section are to be read in this light and are not to be understood as admissions about what is prior art or what is not prior art.
The need to develop and support reliable timing transport systems that rely on packet-based transport is growing. Packet-based transport networks that rely on the ability to transport high-quality traceable timing typically use timestamp-bearing methods such as IEEE1588 or NTP. There have even been systems implemented that use both a timestamp-bearing protocol, such as IEEE1588, and a physical-layer protocol, such as synchronous Ethernet, to improve the accuracy of the recovery process at the receiving node. Other adaptive packet-based timing systems rely on the arrival of packets as the protocol for transporting frequency-based timing over packet networks. Due to the adverse affect of packet delay variation (PDV) on these packet-based systems, equipment providers want to evaluate the susceptibility and degradation due to PDV on the timing recovery performance of these systems.
In Study Group 13 Question 15 of the International Telecommunication Union—Telecommunication Standardization Sector (ITU-T), an effort is underway to define PDV network limits for packet-based timing recovery systems. Fundamental to the work is the ability to relate existing or new metrics as a basis to define specific characteristics or changes in the packet delay distribution of packets that arrive at a receiving node. Second, a methodology is sought in order to create specific types of PDV stress conditions that represent real-world network conditions.
Many packet-based timing recovery systems rely on recovering timing from those packets that experience the least network delay over a given sample period. These low-delay packets are used to determine an “anchor value” that defines the delay-floor and is the basis for establishing and maintaining timing accuracy or phase stability at the receiving node. Still, other packet-based timing recovery systems define anchor values that can be located at other regions of the delay distribution and not necessarily at the minimum delay value over a given sample window. Still, other packet-based timing recovery systems define the anchor value over multiple sample windows that measure other statistical aspects of the delay distribution. It is therefore desired to create a network limit and associated metric that defines an appropriate stress condition that can be used to evaluate the stability of the packet-based timing recovery systems as a basis for a standardized network limit.
Packet-based timing systems can operate in two basic modes: one-way mode or two-way mode. In a one-way mode of operation, only a slave node receives a timing packet flow from a master node. Due to the inability of a slave node to know the exact propagation delay between the master node and the slave node, the resulting anchor value computed by the slave will reflect a negative time error equal to the propagation delay. In a two-way mode of operation, a slave node receives a timing packet flow from a master node and sends measurement packets to and receives measurement packets from the master node. The slave node then uses the timestamps of these measurement packets to (i) compute the one-way delay between the master node and the slave node and (ii) remove the negative time error from the computed anchor value.
To date, a number of ITU-T participants have created contributions that distort various aspects of the packet delay distribution used to determine the anchor value. For example, for timing recovery systems that compute anchor values at or near the delay-floor, various ways have been proposed to create stress conditions that modulate the packet delays of the delay-floor packets. Some vendors have proposed modulating the delays of delay-floor packets by a slowly varying sine wave with a fixed or varying amplitude and frequency. Others have proposed using a statistical means of doing the same. At this time, ITU-T is considering developing a PDV metric that addresses those packets within 150 microseconds of the delay-floor. Numerous contributions have been submitted to ITU-T that either deterministically or statistically modify the delays of packets in this range to create a stress condition at the timing recovery process at the receiving node.
The fundamental issue with the current proposals is the lack of agreement that these stress conditions represent real-world conditions. The key to defining a suitable stress condition stems from the statistical filtering process used at the receiving node to recover a packet-based clock signal. Due to the proprietary nature of these statistical filtering algorithms, a common standardized testing method has not yet been identified. Specifically, these packet-based clock recovery algorithms define methodology for stabilizing the phase of the recovered timing signal called an anchor value. Some algorithms define the anchor value relative to the delay-floor of the received distribution. Still other algorithms may define the anchor value based on specific statistical or filtering methods that exclude packet delays near the delay-floor. Therefore, a testing method that stresses only the delay-floor packets might not fully evaluate packet recovery algorithms based on this latter case. A number of PDV metrics have been devised that examine the delay variation characteristics of packets in various bands of the delay distribution including Minimum Time Deviation (MinTDEV), Percentile Time Deviation (PercentileTDEV), Band Time Deviation (BandTDEV), Cluster Time Deviation (ClusterTDEV), the Maximum Average Frequency Error (MAFE), Minimum MAFE (minMAFE), Maximum Average Time Interval Error (MATIE) and Minimum MATIE (minMATIE). Other metrics have also been developed to describe how the delay-floor anchor value can change under a variety of real-world network conditions including Floor Packet Count (FPC) and Floor Packet Percent (FPP). Therefore, a means of creating stress conditions at the receiving node for each type of anchor value clock stabilizing algorithm is desired.